Huawei, facing U.S. semiconductor sanctions, has reportedly achieved performance surpassing Apple's 3nm chips without using extreme ultraviolet (EUV) lithography. While the semiconductor manufacturing process itself has not been reduced to 3nm, Huawei has altered circuit design and integration methods to create '3nm-level' performance.
The South China Morning Post reported on September 22, citing analysis from U.S.-based investment bank Bernstein, that Huawei's latest application processor, the Kirin 9050 Pro, outperformed Apple's 3nm A17 Pro. Bernstein estimates the manufacturing technology of the Kirin 9050 Pro to be at the 7nm level, while the A17 Pro is the world's first mass-produced 3nm processor for smartphones, released in 2023.
Notably, in the Geekbench 6 multi-core test, the Kirin 9050 Pro surpassed the A17 Pro. Bernstein assessed that the technology gap between Huawei and Apple in mobile chips has narrowed from about four years in the previous generation to three years. However, compared to Apple's latest 2nm A20 Pro, the Kirin 9050 Pro's performance lags by approximately 30%, and its single-core performance is closer to TSMC's older 4nm chips.
The key to this achievement is Huawei's newly commercialized 'Logic Folding.' Traditional semiconductors have enhanced performance by densely packing transistors on a flat surface. In contrast, Huawei has divided circuits into multiple layers stacked vertically, connecting them with fine networks. This approach reduces the distance signals must travel, thereby lowering data processing delays and power consumption.
According to Huawei, the transistor density of the Kirin 9050 Pro, utilizing Logic Folding, has increased by 55% from approximately 155 million to 238 million per square millimeter. For the same performance, power consumption for the NPU has decreased by 66%, for the GPU by 58%, and for the CPU's high-performance cores by 41%. This method does not merely stack circuits to increase heat but reduces signal travel distance to enhance both performance and power efficiency.
However, it is important to note that Logic Folding does not completely replace advanced fine processes. The need for precise bonding of two silicon layers introduces new challenges related to manufacturing yield and process complexity. External experts have also pointed out that expanding this technology to large-scale AI semiconductors could exacerbate heat and production yield issues.
Nonetheless, the message conveyed by the Kirin 9050 Pro is clear. With U.S. sanctions blocking access to EUV technology, Huawei is moving away from the race to create 'smaller transistors' and is instead enhancing performance through 'shorter signal distances' and 'new integration structures.' This evolution in China's semiconductor approach is shifting from simple fine process competition to a combination of design, packaging, and architecture. Huawei's attempts to break through EUV barriers are yielding new results.
* This article has been translated by AI.
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