Micron Technology has announced a partnership with NVIDIA to develop custom high bandwidth memory (HBM), challenging Samsung Electronics and SK Hynix. The competition is shifting from standard specifications and yield battles to the design capabilities of base die and foundry collaborations.
On September 30, Micron officially confirmed its joint development of custom HBM for NVIDIA's next-generation AI accelerators during its fourth-quarter fiscal year earnings announcement. Micron CEO Sanjay Mehrotra emphasized, "We are working on a collaborative design that is tailored from the base die stage to meet NVIDIA's specifications for the next-generation standard."
Traditionally, semiconductor companies produced products according to the standards set by the Joint Electron Device Engineering Council (JEDEC) for the existing fifth-generation HBM (HBM3E) and then supplied them after passing quality tests from major tech clients like NVIDIA.
However, starting with the sixth-generation HBM (HBM4), custom HBM will be designed to fit the circuit architecture and power specifications of clients' next-generation graphics processing units (GPUs) or neural processing units (NPUs) from the base die level.
This announcement is seen as a strategic move by Micron to overcome its disadvantages in the HBM market and secure a key supplier position for NVIDIA's next-generation products.
Industry experts highlight the manufacturing method of the base die, which acts as the "brain" of HBM, as a critical factor. The base die is the essential chip that vertically connects DRAM and controls communication at the bottom of HBM. With HBM4, the data pathways (I/O) will double in width, making it impossible to manage heat and power efficiency with existing memory processes.
NVIDIA CEO Jensen Huang has also stated, "The key to the performance of next-generation accelerators lies in how closely memory and logic chips are integrated, with the base die at the center of this integration."
Samsung is producing base dies using its advanced 4-nanometer and 2-nanometer foundry processes. The company plans to offer a turnkey, one-stop solution starting with the production of HBM4, leveraging its integrated semiconductor capabilities as a differentiated advantage. Samsung aims to minimize bottlenecks in packaging and processes to shift the market dynamics starting from the mass production of HBM4 in 2026.
SK Hynix is strengthening its partnership with TSMC, jointly developing base dies for HBM4 using TSMC's 12-nanometer and 5-nanometer foundry processes. The collaboration aims to enhance product yield and quality stability through close integration with TSMC's advanced 3D packaging technology, CoWoS.
Without its own logic process, Micron plans to shift from producing base dies with its existing DRAM process to supplying base dies optimized for NVIDIA's next-generation GPU specifications through collaboration with TSMC. The company aims to increase its global HBM market share from around 10% to the mid-20% range by 2025.
Lee Jong-hwan, a professor at Sangmyung University’s Department of System Semiconductor Engineering, noted, "The next-generation HBM marks a turning point where memory transitions from a general product to a foundry-type customized logic semiconductor. Securing design capabilities for base dies and packaging yields that meet the specifications of global tech giants is crucial."
* This article has been translated by AI.
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